Jae-Won Jang's Resume

Jae-Won Jang

Security-focused computer engineer who enjoys learning deeply and teaching others.

Falls Church, VA

Jae-Won Jang's profile picture

About

I am a Senior Cyber Engineer at MITRE with a Ph.D. in Computer Engineering, specializing in software and systems security, control-flow integrity, and secure system design, with experience across compiler- and binary-level security, ARM architectures, and software supply-chain verification.

Alongside my professional work, I have a strong interest in learning and teaching. Many of the projects on this site are personal deep-dives into topics I'm currently revisiting, like Rust. I share this work publicly to help cement my own understanding, and hopefully, to make the learning process a bit easier for anyone else.
More about my background

I began my Computer Engineering journey as an undergraduate at the University of South Florida, where I later continued directly into a Master’s program under Dr. Swaroop Ghosh. After completing my M.S. in 2015, I followed Dr. Ghosh to Penn State University to pursue a Ph.D.

A few years into the program, I found myself struggling—both physically and mentally. The cumulative pressure of research, teaching, and preparing for the qualifier exam took a toll, and I ultimately decided to step away from the Ph.D. program. This decision was not the result of external circumstances or anyone else’s fault. Instead, it came from my own realization that I had underestimated what the Ph.D. demands.

After leaving the program, I spent a year working in industry. During that time, I couldn't shake the feeling that something was missing. I had to figure out what I really wanted long-term: was I content climbing the industry ladder, or did I need to give the Ph.D. one more proper shot? Ultimately, I realized that if I didn't give the Ph.D. another genuine attempt, I might never get the chance again. That realization pushed me to return to academia.

I joined the SSRG Lab at Virginia Tech under the guidance of Dr. Binoy Ravindran, whom I consider one of the most influential mentors in my life. Under his mentorship, I learned not only how to conduct rigorous research, but also how to approach challenges in life with perspective and resilience. After six years, I earned my Ph.D. in Computer Engineering in 2024.

The reason I share this story is tied to something more personal. Recently, I watched Culinary Class Wars Season 2 (흑백요리사 2), where my favorite chef, Choi Kang Rok (최강록), competed—and won. I was initially uninterested in the show, but learning that he had returned to compete again caught my attention, as I never expected him to do so. After watching the show, what ultimately inspired me to share my own background was his final remark:

“재도전해서 좋았다” — “It was good to try again.”

That statement resonated deeply with me and reflected how I feel about my own decision to return and try again.

There are two lessons I hope to convey through my experience:

  • Trying again is not a failure. Recognizing when something is not working, stepping away, and returning with clarity is a form of resilience. It is better to retry and risk regret than to never try again and live with unanswered “what ifs.”
  • To me, Ph.D. does not stand for intelligence. It stands for Perseverance, Hard work, and Dedication. Success in a Ph.D. requires patience, luck, the right guidance, and—above all—the willingness to keep going even when things feel overwhelming.

If you’ve read this far and see parts of yourself in this story, feel free to reach out. I’m always happy to share experiences or insights if they might help.

You can contact me at jw-jang [at] outlook [dot] com.

Work Experience

MITRE Corporation

2025 - Present

Senior Cyber Engineer

  • Developed a modular, containerized framework for automated software supply-chain verification, extending TruffleHog to improve secret-scanning and dependency-analysis coverage across source repositories.
  • Authored technical documentation and conducted architectural analyses of processor (RISC/CISC) and system design trade-offs to support modernization and performance optimization decisions.
  • Led technology assessments and integration analyses for multi-level security (MLS), producing feasibility, risk, and trade-space evaluations to guide system design decisions.
  • Supply-chain Security
  • SELinux
  • Rust
  • MLS
  • Trade-space Analysis

Virginia Tech

2018 - 2024

Research Assistant

  • Designed and deployed compiler- and binary-level security mechanisms to enforce control-flow integrity and automated data compartmentalization across untrusted code modules.
  • Integrated the ARM Memory Tagging Extension (MTE) into a compiler toolchain, strengthening runtime memory safety and fault isolation.
  • Implemented static and dynamic taint analysis to identify sensitive data paths and compartmentalization targets, automatically rewriting assembly code to isolate protected data regions.
  • Control-flow Integrity
  • ARM MTE
  • Binary Rewriting
  • Taint Analysis
  • LLVM/Clang

Raytheon

2017 - 2018

Software Engineer

  • Supported documentation compliance for unclassified deliverables pending clearance activation.
  • Technical Writing

Teaching Assistant

  • Taught the course CMPSC 122: Intermediate Programming and led discussion sessions.
  • Teaching

Research Assistant

  • Researched hardware security and reverse-engineering countermeasures using transistor-level camouflaging and logic obfuscation.
  • Designed and evaluated a method for camouflaging inter-gate connections by modulating transistor threshold voltages, increasing resistance to structural and functional reverse engineering.
  • Hardware Security
  • Logic obfuscation
  • Camouflaging
  • Reverse Engineering

Research Assistant

  • Investigated hardware security primitives based on CMOS and spintronic memory technologies, including MTJ-based designs to improve PUF stability and STT-MRAM robustness against magnetic and thermal attacks.
  • DDesigned schematics and physical layouts of non-volatile sequential elements using a 65nm process (up to M8 metal), culminating in a full padframe tape-out for prototype fabrication.
  • Hardware Security
  • PUFs
  • STT-MRAM
  • Spintronics
  • ASIC Layout

Intel

2013 - 2013

Intern

  • Developed analytics modules for the AIM Suite to measure customer engagement with in-store digital displays.
  • Evaluated MongoDB for production deployment, analyzing scalability, data modeling trade-offs, and system integration constraints.
  • MongoDB
  • Hardware Debugging
  • Analytics

Education

Skills

Languages
Assembly (ARM, x86/x64), C, C++, Haskell, Python, Rust
Tools
angr, Binary Ninja, CMake, Docker, Dyninst, GDB, Ghidra, Intel PIN, LLVM/Clang, QEMU, Radare2

Projects & Experiments

Rust Up Knowledge

A personal Rust knowledge base designed for quick recall and long-term learning.

  • Rust