CV
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Contact Information
| Name | Jae-Won Jang |
| Professional Title | Senior Cyber Engineer |
| jw-jang@outlook.com | |
| Location | Falls Church, VA |
Professional Summary
Security-focused computer engineer with an active Top-Secret clearance and a Ph.D. in Computer Engineering from Virginia Tech. Research interests span software and systems security, control-flow integrity, secure system design, compiler- and binary-level security, ARM architectures, and software supply-chain verification.
Experience
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2025 - Present McLean, VA
Senior Cyber Engineer
MITRE Corporation
Prototyping containerized data ingestion pipelines, LLM-assisted architecture analysis, and automated software supply-chain verification for government sponsors.
- Architecture & Prototyping: Co-led the design and end-to-end prototyping of a containerized AMQP 1.0 data ingestion pipeline built on Protobuf, Rust, Go, Docker/Podman, and PostgreSQL.
- Sponsor Engagement & Technical Trade-space: Presented architectural prototypes and sponsor-aligned demonstrations directly to primary DoW sponsors; these engagements informed technical trade-space decisions and prototype priorities.
- AI-Assisted System Analysis: Led applied research and prototyping of an LLM-based pipeline using MCP, Python, and OpenCode to extract structured, code-traceable architecture knowledge from legacy codebases, supporting software assessment and modernization.
- Artifact-Based System Modeling: Prototyped the analysis of binaries, SBOMs, configurations, and delivery artifacts to assess architectural and technical risk without proprietary source code. Proposed extracting these results into textual notation (e.g., SysML v2) for headless, reproducible system modeling to reduce subjectivity for systems engineers.
- Supply-Chain Security: Designed and deployed a modular, containerized software supply-chain verification framework. Extended TruffleHog with a custom file detector that extracts import statements from repository files, cross-checks them against SBOMs, and flags missing, unused, and internal-only packages. Combined dependency analysis with embedded-secret and configuration-risk detection.
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2018 - 2024 Blacksburg, VA
Research Assistant
Virginia Tech
Ph.D. research with Dr. Binoy Ravindran on compiler- and binary-level security: control-flow integrity, ARM Memory Tagging Extension integration, and automated data compartmentalization.
- Designed and deployed compiler- and binary-level security mechanisms to enforce control-flow integrity and automated data compartmentalization across untrusted code modules.
- Integrated the ARM Memory Tagging Extension (MTE) into a compiler toolchain, strengthening runtime memory safety and fault isolation.
- Implemented static and dynamic taint analysis to identify sensitive data paths and compartmentalization targets, automatically rewriting assembly code to isolate protected data regions.
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2017 - 2018 State College, PA
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2017 - 2017 State College, PA
Teaching Assistant
Penn State University
- Taught CMPSC 122: Intermediate Programming and led weekly discussion sessions.
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2016 - 2017 State College, PA
Research Assistant
Penn State University
Advisor: Dr. Swaroop Ghosh
- Researched hardware security and reverse-engineering countermeasures using transistor-level camouflaging and logic obfuscation.
- Developed a threshold-voltage-based technique to conceal gate interconnects and logic identities.
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2013 - 2016 Tampa, FL
Research Assistant
University of South Florida
Advisor: Dr. Swaroop Ghosh
- Researched hardware security primitives leveraging CMOS and spintronic memory technologies, exploring MTJ-based techniques to improve PUF stability and STT-MRAM robustness against magnetic and thermal attacks.
- Completed a tape-out of a padframe for prototype fabrication.
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2013 - 2013 Hillsboro, OR
Undergraduate Intern
Intel
- Developed analytics modules for the AIM Suite project to measure customer engagement with in-store digital displays.
- Evaluated MongoDB integration for production deployment, assessing scalability, data modeling, and system compatibility.
Education
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2018 - 2024 Blacksburg, VA
Ph.D.
Virginia Tech
Computer Engineering
- GPA: 3.74 / 4.00
- Dissertation: Enhancing Software Security through Code Diversification Verification, Control-flow Restriction, and Automatic Compartmentalization
- Research focus: software verification, control-flow integrity, and automated compartmentalization.
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2014 - 2015 Tampa, FL
M.S.
University of South Florida
Computer Engineering
- GPA: 3.76 / 4.00
- Thesis: Security of Non-Volatile Memories — Attack Models, Analyses, and Counter-Measures
- Research focus: spintronics-based memory security.
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2009 - 2013 Tampa, FL
Skills
Languages: Assembly (ARM, x86/64), C, C++, Go, Haskell, Python, Rust, SQL
Security Research: Automated compartmentalization, Control-flow integrity, Software verification, Static and dynamic taint analysis
Analysis & Tooling: angr, Binary Ninja, CMake, Dyninst, GDB, Ghidra, Intel PIN, LLVM/Clang, QEMU, Radare2
Infrastructure & Protocols: AMQP 1.0, Docker, GitLab, Podman, PostgreSQL, Protobuf